The present invention relates to an apparatus for receiving spread spectrum signals such as satellite signals used in a mobile positioning system or the like.
2. Description of the Prior Art
There is known a system for determining the position of a mobile object by utilizing a plurality of artificial satellites which orbit around the earth, and a method of spread spectrum modulation is employed in such system to process satellite signals. For example, in a position determining system termed GPS (global positioning system), a satellite signal is transmitted in a state where 50-bps orbit parameter data (inclusive of orbit data to indicate the time and position of the satellite) are processed by spread spectrum modulation in accordance with a pseudo-random noise code (e.g., GOLD code) having a chip speed of 1.023 Mhz and a period of 1 msec, and two carriers of 1575.42 MHz and 1227.6 MHz are processed by orthogonal phase modulation (two-phase PSK modulation).
A GPS receiver processes input signals received from at least three satellites with follow-up and spectrum inverse spread of the aforementioned carriers to thereby demodulate the orbit parameter data of each satellite, hence obtaining data of the signal arrival time (i.e., the distance between the satellite and the user is found from the satellite signal arrival time) and the satellite position. The position of the user can be determined three-dimensionally from the intersections of spheres plotted with the centers corresponding to the positions of the satellites and the radii corresponding to the measured distances.
FIG. 9 shows an exemplary constitution of a conventional GPS receiver. A signal received at an antenna 1 is supplied to a radio frequency processing circuit 2 where the carrier is converted into an intermediate frequency signal of 10.7 MHz (signal band 10.7 .+-.1.023 MHz).
The intermediate frequency signal is supplied to a demodulator which will be described below. The demodulator comprises a feedback loop for inverse spread to demodulate the spread spectrum modulation, and another feedback loop for demodulating the two-phase modulation based on orbit parameter data bits.
In this example, the technique known as .tau.-dither tracking is adopted in the inverse spread demodulating feedback loop. Denoted by 20 is a code generator for generating pseudo-random noise codes on the receiver side, inclusive of an early code Me and a late code Md having a phase difference of the 1-chip time. The early code Me and the late code Md from the code generator 20 are supplied to an early/late code selector 21, which is selectively switched every millisecond by an early/late switch 22 so that a composite pseudo-random noise code is obtained from the code selector 21. The composite pseudo-random noise code thus obtained is then supplied to a balanced modulator 3. And the intermediate frequency signal from the radio frequency processing circuit 2 is supplied to the balanced modulator 3 so that the signal is modulated by the composite pseudo-random noise code.
The code generator 20 is controlled by clock pulses which are produced from a clock generator 23 as a code driver and are controlled in both phase and frequency as will be described later, in such a manner that the phases and the frequencies (chip speeds) of the early and late pseudo-random noise codes Me and Md are rendered coincident with the phase and the frequency (chip speed) of the pseudo-random noise code included in the intermediate frequency signal obtained from the radio frequency processing circuit 2.
The feedback loop for demodulating the data bits is composed of a costas loop in this example. The costas loop comprises a carrier generator 4 consisting of a voltage-controlled variable frequency oscillator (hereinafter referred to as VCO) and a 90.degree. phase shifter, first and second analog multipliers 5 and 6, low-pass filters 7 and 8, a third analog multiplier 9, and a loop filter 10.
First and second carrier signals (cos.omega.t and sin.omega.t) of orthogonal phases are obtained from the carrier generator 4 and then are supplied to the first and second multipliers 5 and 6 respectively so as to be multiplied by the inverse-spread intermediate frequency signal Si=(.+-.Acos (.omega.t+.phi.)) obtained from the balanced modulator 3. The outputs of the first and second multipliers 5 and 6 are supplied via the low-pass filters 7 and 8 respectively to the third multiplier 9 so as to be multiplied mutually. The output level of the third multiplier 9 represents the phase difference between the carrier component of the received signal and the carrier produced from the carrier generator 4. The output of the multiplier 9 is supplied via the loop filter 10 to the carrier generator 4 so that the VCO in the carrier generator 4 is controlled for causing the phase of the output carrier signal of the carrier generator 4 to follow up the carrier component in the signal Si.
The outputs (.+-.1/2 Acos1/2 and .+-.1/2 sin.phi.) of the first and second low-pass filters 7 and 8 in the costas loop are supplied respectively to square-law detectors 11 and 12 where square-law detection is performed. The outputs thereof are then supplied to an adder 13 so as to be added to each other. The output of the adder 13 indicates the level of correlation between the received pseudo-random noise code and the pseudo-random noise code obtained from the code generator 20.
The output of the adder 13 is supplied via an analog switch 14 to an early data holder 15 and a late data holder 16 each consisting of an integrator. The analog switch 14 is changed by a switching signal from the early/late switch 22 in synchronism with a change of the early/late code selector 21. Therefore, when the pseudo-random noise code from the code generator 20 is an early code Me, the correlation level output obtained is stored in the early data holder 15. On the other hand, when the pseudo-random noise code from the code generator 20 is a late code Md, the correlation level output obtained is stored in the late data holder 16.
The correlation level outputs of the early data holder 15 and the late data holder 16 are supplied to a subtracter 17 consisting of a differential amplifier or the like, whereby the difference between the two correlation level outputs is obtained therefrom. This difference output represents the phase error between the received pseudo-random noise code and the pseudo-random noise code from the code generator 20. This difference output is supplied via a loop filter 18 to a VCO in a clock generator 23 which serves as a code driver, so that the output pseudo-random noise code from the code generator 20 is so controlled as to follow up the received pseudo-random noise code as mentioned.
The correlation level output from the adder 13 is supplied to a search/sync detector 19, and the frequency of the output clock signal from the clock generator 23 is widely changed until a predetermined correlation is attained by the detector 19 with respect to the received pseudo-random noise code in the phase locking process for the aforementioned pseudo-random noise code, and also the frequency and the phase of the pseudo-random noise code from the code generator 20 are widely changed to perform a search. Once the predetermined correlation is attained, the search is brought to a halt and thereafter the clock generator 23 is controlled by the output of the loop filter 18.
In the manner described above, the received signal based on spread spectrum modulation is demodulated by the inverse spread feedback loop, while the data bits are demodulated by the costas loop. The demodulated data bit output is obtained from the low-pass filter 7 and then is supplied to a data demodulator (not shown) so that the orbit parameter data is demodulated.
However, the conventional spread spectrum signal receiving apparatus mentioned above requires the balanced modulator 3 for attaining a predetermined correlation to the pseudo-random noise code on the receiver side, hence raising the necessity of an analog circuit technique to keep a proper balance of the balanced modulator 3.
Furthermore, since each of the carrier generator and the clock generator 23 is equipped with a VCO, circuit techniques and circuit elements are required for maintaining a desired linearity of the VCO. Consequently the structure of the receiving apparatus is complicated with another disadvantage of causing an increase in the production cost. In addition, there is a further disadvantage that a dimensional increase of the apparatus is unavoidable.
Besides the above, the parameters of the inverse spread feedback loop and the data bit demodulating feedback loop are numerically fixed by the circuit elements or parts to consequently bring about a problem that the parameters are not easily changeable for control.